TechnologiesLow-level, Kernel & Legacy

Hypervisor

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Hypervisor provides a low-level API for building virtualization solutions on macOS without writing kernel extensions. You configure and manage virtual machines, virtual CPUs, guest memory, and interrupt controllers through types such as OS_hv_vm_config, OS_hv_vcpu_config, and OS_hv_gic_config. Working with virtual CPUs, you read and write guest registers (hv_reg_t, hv_sys_reg_t, hv_simd_fp_reg_t) and handle returns to the host by inspecting exit information in hv_vcpu_exit_t and hv_exit_reason_t. The framework also exposes generic interrupt controller state through hv_gic_distributor_reg_t, hv_gic_redistributor_reg_t, and related register types, along with controls for interrupts, caches, and TLB invalidation.

Virtual Machine and CPU Configuration 4

Configuration objects that define a virtual machine, its virtual CPUs, and its interrupt controller.

  • Pr
    OS_hv_vm_config
    An object that configures the properties of a virtual machine before it is created.
  • Pr
    OS_hv_vcpu_config
    An object that configures the properties of a virtual CPU before it is created.
  • Pr
    OS_hv_gic_config
    An object that configures the generic interrupt controller for a virtual machine.
  • Pr
    OS_hv_gic_state
    An object that holds the saved state of a virtual machine's generic interrupt controller.

Virtual CPU Exits 3

Types that describe why a virtual CPU returned control to the host and the details of the triggering event.

  • St
    hv_vcpu_exit_t
    @abstract Contains information about an exit from the vcpu to the host.
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    hv_exit_reason_t
    @abstract Events that can trigger a guest exit to the VMM
  • St
    hv_vcpu_exit_exception_t
    @abstract Contains details of a vcpu exception.

Guest CPU Registers 4

Identifiers for the general-purpose, system, and floating-point registers of a guest virtual CPU.

  • St
    hv_reg_t
    @abstract Type of an ARM register.
  • St
    hv_sys_reg_t
    @abstract Type of an ARM system register.
  • St
    hv_simd_fp_reg_t
    @abstract Type of an ARM SIMD&FP register.
  • St
    hv_feature_reg_t
    @abstract ARM feature register.

Scalable Matrix Extension State 3

Types that represent a virtual CPU's Scalable Matrix Extension state and its associated vector and predicate registers.

  • St
    hv_vcpu_sme_state_tmacOS 15.2+
    @abstract Contains information about SME PSTATE.
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    hv_sme_z_reg_tmacOS 15.2+
    @abstract Type of an ARM SME Z vector register.
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    hv_sme_p_reg_tmacOS 15.2+
    @abstract Type of an ARM SME P predicate register.

Generic Interrupt Controller Registers 7

Register identifiers for the distributor, redistributor, CPU interface, and messaging components of the GIC.

  • St
    hv_gic_intid_tmacOS 15.0+
    @abstract Type of an ARM GIC interrupt id.
  • St
    hv_gic_distributor_reg_tmacOS 15.0+
    @abstract Type of an ARM GIC distributor register.
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    hv_gic_redistributor_reg_t
    @abstract Type of an ARM GIC redistributor register.
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    hv_gic_icc_reg_tmacOS 15.0+
    @abstract Type of an ARM GIC ICC system control register.
  • St
    hv_gic_ich_reg_tmacOS 15.0+
    @abstract Type of an ARM GIC virtualization control system register.
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    hv_gic_icv_reg_tmacOS 15.0+
    @abstract Type of an ARM GIC ICV system control register.
  • St
    hv_gic_msi_reg_t
    @abstract Type of an ARM GIC Distributor message based interrupt register.

Interrupts, Caches, and Memory Management 4

Enumerations that select interrupt kinds, cache types, TLB invalidation operations, and intermediate physical address granules.

  • St
    hv_interrupt_type_t
    @abstract Injected interrupt type.
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    hv_cache_type_t
    @abstract Cache type.
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    hv_tlbi_op_tmacOS 27.0+
    @abstract TLB invalidation operations for hv_vcpu_invalidate_tlb().
  • St
    hv_ipa_granule_tmacOS 26.0+
    @abstract Supported intermediate physical address (IPA) granules.

Type Aliases 12

  • Ty
    hv_gic_config_t
  • Ty
    hv_gic_state_t
  • Ty
    hv_vcpu_config_t
  • Ty
    hv_vcpu_t
    @abstract Type of a vcpu instance ID
  • Ty
    hv_exception_syndrome_t
    @abstract Type of a vcpu exception syndrome (Corresponds to ESR_ELx).
  • Ty
    hv_exception_address_t
    @abstract Type of a vcpu exception virtual address. (Corresponds to FAR_ELx).
  • Ty
    hv_simd_fp_uchar16_t
    @abstract Value of an ARM SIMD&FP register.
  • Ty
    hv_sme_zt0_uchar64_t
    @abstract Type of the SME2 ZT0 register.
  • Ty
    hv_allocate_flags_t
  • Ty
    hv_vm_config_t
  • Ty
    hv_ipa_t
    @abstract Type of an Intermediate Physical Address (a guest physical address)
  • Ty
    hv_memory_flags_t
    @abstract Guest physical memory region permissions for hv_vm_map() and hv_vm_protect()
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